Photolithography (also optical lithography) is a process used in microfabrication to selectively remove parts of a thin film (or the bulk of a substrate). Photolithography uses light to transfer a geometric pattern from a photomask to a light-sensitive chemical (photoresist, or simply “resist”) on the substrate. Elements of a circuit to be created on the IC are reproduced in a pattern of transparent and opaque areas on the surface of the photomask (or reticle), e.g., a quartz plate. A stepper passes light through the photomask, forming an image of the photomask pattern. The image may be focused and reduced by a lens, and projected onto the surface of a silicon wafer that is coated with the photoresist.
After exposure in the stepper, the coating on the wafer is developed like photographic film, causing the photoresist to dissolve in certain areas according to the amount of light the areas received during exposure. These areas of photoresist (and no photoresist) reproduce the pattern on the photomask. The developed wafer is then exposed to acids or other chemicals. The acids etch away the silicon in the parts of the wafer that are no longer protected by the photoresist coating. The other chemicals are used to change the electrical characteristics of the silicon in the bare areas. The wafer is then cleaned, recoated with photoresist, then passed through the stepper again, e.g., using another photomask, in a process that creates the circuit on the, e.g., silicon substrate layer by layer. The entire process is called photolithography. In a complex integrated circuit (e.g., a modern CMOS device), a wafer will go through the photolithographic cycle on the order of 50 times.
The photomask is an opaque plate with topography or transparencies that allow light to shine through in a defined pattern. Lithographic photomasks may be, e.g., transparent fused silica or quartz blanks covered with a pattern defined with, e.g., a chrome metal absorbing film. In order to fabricate an integrated circuit, a set of photomasks, each defining a pattern layer in the integrated circuit fabrication, is fed into a photolithography stepper or scanner and individually selected for exposure, as described above. Thus, prior to the fabrication of the integrated circuit device using the photolithographic process, the photomasks are manufactured.
In photomask manufacturing, e.g., quartz blanks are coated with an absorbing material and an imaging film (i.e., a photoresist) to form the photomask pattern. The image for the photomask may originate from a computerized data file. This data file is converted to a series of polygons and written onto, e.g., a square fused quartz substrate covered with a layer of chrome using a photolithographic process. A beam of electrons may be used to expose the photomask pattern defined in the data file and travels over the surface of the photomask blank in either a vector or raster scan manner. Where the photoresist on the photomask exposes a portion on the layer of chrome so that this portion of the chrome can be etched away, leaving a clear path in this portion of the photomask for the light to travel through the photomask in the stepper/scanner systems.
However, a relatively small number of defects on the photomask blank might manifest themselves as defects during photomask patterning, which can affect final photomask quality and result in yield loss (e.g., wafer and/or photomask yield loss) and additional defect repair work. For example, performing photolithography with a photomask that includes defects may cause defects to be formed in the integrated circuit device. Thus, defects in a photomask have a direct impact on photomask manufacturing costs and turn-around times.
The preferred solution to yield loss from photomask blank defects is to lower printable defect count on the photomask blank with cleaner processing and/or repair. However, obtaining defect free photomask blanks (or lowering photomask blank defect count) is a significant challenge as lithographic feature size and the minimum printable defect size continue to be reduced. Moreover, photomask blank defects in new materials that may be needed for the AEPSM (Attenuated Embedded Phase Shift Mask) have increased. This increase in photomask blank defects has in turn reduced the yield after pattern defect inspection and, consequently, final photomask yield. Moreover, next generation lithography techniques, such as electron projection lithography (EPL) and extreme ultraviolet lithography (EUVL), require photomask blanks made from different materials than binary optical masks or AEPSM. These new photomask blanks may initially have more defects than present photomask blanks for optical projection lithography. Therefore, a method to pattern masks with high yield on mask blanks that have defects is desirable.
To enable the use of mask blanks that are not defect free but have a reasonably small number of defects, the pattern on the photomask can be moved so that the photomask blank defects do not affect the printed pattern. If mask blank defects can be accurately located and evaluated, the patterning process can be modified to accommodate some defects on the blank.
However, there is no ability to reliably align the photomask blank with the pattern generator to ensure a higher calibration alignment by the pattern generator. Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.